From 249efa0ed157ba9bf3fbcf642933d707e2fa4281 Mon Sep 17 00:00:00 2001
From: Oliver Ford <oliford@NervousEnergy.(none)>
Date: Thu, 17 Apr 2008 21:11:45 +0100
Subject: [PATCH] test code for multiword transfer instruction

---
 src/irq.cpp |   77 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 77 insertions(+), 0 deletions(-)

diff --git a/src/irq.cpp b/src/irq.cpp
index b89905c..2a5cb83 100644
--- a/src/irq.cpp
+++ b/src/irq.cpp
@@ -270,6 +270,8 @@ mainLoop(struct irqData *data, int seconds)
     uint32 cur_time = start_time;
     uint32 fin_time = cur_time + seconds * 1000;
     int tmpcount = 0;
+    int doneTest = 0;
+
     for (;;) {
         int ret = printTrace(cur_time - start_time, data);
         if (ret) {
@@ -290,6 +292,81 @@ mainLoop(struct irqData *data, int seconds)
         tmpcount = 0;
         if (cur_time >= fin_time)
             break;
+
+	//Test code for multiword read/write trapping/simulation
+        //Run this without watching the target and then with and see
+        //  that the results are the same.
+        if(!doneTest && (cur_time - start_time) > 4000){  //do it after 4s
+            Output("Performing multiword tests...");
+
+            uint32 *base;
+            uint32 read1,read2,read3,read4;
+
+            //put this somewhere we can splurg on happily
+            base = (uint32 *)memPhysMap(0xbc000000); 
+            Output("Initial base address is: 0x%08x",(uint32)base);
+
+            __asm("mov  r9,%4\n"
+                "ldr  r1, =0x01234567\n"
+                "ldr  r2, =0x89abcdef\n"
+                "ldr  r3, =0xfeedface\n" //...with...
+                "ldr  r4, =0xdeadbeef\n"
+                "add  r0, r9, #0x40\n"
+                "add  r8, r9, #0x00\n"
+                "stmdb    r0, {r1,r2,r3,r4}\n"    //pre decrement write, don't change r0
+                "str    r0, [r8]\n"
+
+                "add  r0, r9, #0x60\n"
+                "add  r8, r9, #0x04\n"
+                "stmda    r0, {r1,r2,r3,r4}\n"    //post decrement write, don't change r0
+                "str    r0, [r8]\n"
+
+                "add  r0, r9, #0x80\n"
+                "add  r8, r9, #0x08\n"
+                "stmib    r0, {r1,r2,r3,r4}\n"    //pre increment write, don't change r0
+                "str    r0, [r8]\n"
+
+                "add  r0, r9, #0xA0\n"
+                "add  r8, r9, #0x0c\n"
+                "stmia    r0, {r1,r2,r3,r4}\n"    //post increment write, don't change r0
+                "str    r0, [r8]\n"
+
+                //and all again without the index changing
+                "add  r0, r9, #0xC0\n"
+                "add  r8, r9, #0x10\n"
+                "stmdb    r0!, {r1,r2,r3,r4}\n"    //pre decrement write, change r0
+                "str    r0, [r8]\n"
+
+                "add  r0, r9, #0xE0\n"
+                "add  r8, r9, #0x14\n"
+                "stmda    r0!, {r1,r2,r3,r4}\n"    //post decrement write, change r0
+                "str    r0, [r8]\n"
+
+                "add  r0, r9, #0x100\n"
+                "add  r8, r9, #0x18\n"
+                "stmib    r0!, {r1,r2,r3,r4}\n"    //pre increment write, change r0
+                "str    r0, [r8]\n"
+
+                "add  r0, r9, #0x120\n"
+                "add  r8, r9, #0x1C\n"
+                "stmia    r0!, {r1,r2,r3,r4}\n"    //post increment write, change r0
+                "str    r0, [r8]\n"
+
+                "add  r8, r9, #0x20\n"
+                "ldmdb    r0!,{r2,r3,r4,r5}\n"    //pre decrement read, should undo stmia
+                "mov    %0, r2\n"        
+                "mov    %1, r3\n"
+                "mov    %2, r4\n"
+                "mov    %3, r5\n"
+                "str    r0, [r8]\n"
+
+                 : "=r" (read1), "=r" (read2), "=r" (read3), "=r" (read4)     //output
+                 : "r" (base)            //input
+                 : "r0","r1","r2","r3","r4","r5","r8","r9");     //clobbered
+
+            Output("Tests complete. ldmia read back: %08x %08x %08x %08x",read1,read2,read3,read4);
+            doneTest=1;
+        }
     }
 }
 
-- 
1.5.2.5